Verilog vhdl Jobs
Ich benötige Unterstützung bei der Programmierung in Assembler and VHDL. Die Aufgaben sind nur in Deutscher Sprache verfügbar. Ich brauche Deine Unterstützung am Dienstag den 6. April von 11 bis 13 Uhr. Ich kann Dir vorab Beispielaufgaben zusenden.
Hardware Entwicklung für Fuel Management und Fuel Gauging Systeme für ein Kunden in der Luft- und Raumfahrt-Branche. Suche nach erfahrenen und eigenständigen Hardware-Ingenieuren mit Durchsetzungsvermögen, die über Expertenwissen in der Elektrotechnik / Mess- u. Regelungstechnik verfügen. Als Vorraussetzungen gelten: - gute Kenntnisse in der Digital- / Analot... Suche nach erfahrenen und eigenständigen Hardware-Ingenieuren mit Durchsetzungsvermögen, die über Expertenwissen in der Elektrotechnik / Mess- u. Regelungstechnik verfügen. Als Vorraussetzungen gelten: - gute Kenntnisse in der Digital- / Analotechnik - Kenntnisse von Simulations- und Prüfumgebungen - Kenntnisse mit technischer Dokumentation/Nachweisführung. Technisc...
I need an expert to create a single lane bidirectional differential sender/receiver that connects two Xilinx FPGAs. Key Requirements: - The main purpose of this connection is data transfer between the two FPGAs. - The target data transfer rate is up to 1 Gbps (typ. 500 MBaud in DDR fashion) Ideal Skills: - Proficiency in FPGA programming, particul...two Xilinx FPGAs. Key Requirements: - The main purpose of this connection is data transfer between the two FPGAs. - The target data transfer rate is up to 1 Gbps (typ. 500 MBaud in DDR fashion) Ideal Skills: - Proficiency in FPGA programming, particularly with Xilinx FPGAs. - Familiarity with the SerDes, IO-Delay, clocking archtecture of Spartan-6 - Language: VHDL Please do not post any suggestions unless you have experience in ...
...Python/Java, JPA, JWT, and MySQL. Bootstrap & Power BI Merge design and data for visually stunning insights. Embedded Systems Work with TI Boards, STM controllers, Linux, and cutting-edge embedded tech. Cloud Computing Teach AWS, Python, Terraform, and cloud-first solutions. Blockchain Be the guide to secure, decentralized future technologies. VLSI Design & Verification Lead with expertise in Verilog, SystemVerilog, and UVM. VLSI Design for Test (DFT) Shape the semiconductor field with Scan BIST, MBIST, and ATPG. Location: Tamil Nadu(Ready to travel and stay all over TN) and Andhra pradesh Why Join Us? Flexible freelance opportunities Shape the future of engineering talent Collaborate with a forward-thinking team Let’s build something extraordinary, to...
I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices
Spyglas,VCS,DC,DFT,Verdi,Catapult,Synplify,VerilogXL,Virtuoso,Xcelium,Spectre,Allegro,Vivado,Quartus,ModleSim, Matlab,Octave,Signal Generator,Logic Analyzer,Anaconda,Tensorflow,Keras,Darknet ,notepad++. Language mastery: Verilog,SystemVerilog,UVM,C,C++,VHDL,Python,Firmware etc. Familiar with using: Linux, Windows,Unix,MS-DOS,FreeRTOS. PreviousFields: AISC/IP/IC design,SOC design/verification,FPGA Design/Verification and debugging,AI (especially deep learning),complex digital systems,complex communication systems,mixed digital and analog systems. Work experience focused in Beijing China 5+ years of ASIC experience and 10+ years of FPGA experience, experienced Senior Technical Lead with a demonstrated history of working in the semiconductors industry. Part of 5+ tap...
...JWT, and MySQL. 3️⃣ Bootstrap & Power BI Merge design and data for visually stunning insights. 4️⃣ Embedded Systems Work with TI Boards, STM controllers, Linux, and cutting-edge embedded tech. 5️⃣ Cloud Computing Teach AWS, Python, Terraform, and cloud-first solutions. 6️⃣ Blockchain Be the guide to secure, decentralized future technologies. 7️⃣ VLSI Design & Verification Lead with expertise in Verilog, SystemVerilog, and UVM. 8️⃣ VLSI Design for Test (DFT) Shape the semiconductor field with Scan BIST, MBIST, and ATPG. ? Location: Tamil Nadu(Ready to travel and stay all over TN) and Andhra pradesh ? Why Join Us? Flexible freelance opportunities Shape the future of engineering talent Collaborate with a forward-thinking team ? Let’s build something extraordinary, to...
The company is seeking FPGA Designers proficient in VHDL to outsource specific tasks. Some tasks will require a remote server connection for accessing resources and collaborative development. Skills Required: Proficiency in VHDL for FPGA design and development. Experience with simulators such as ModelSim or Active-HDL/Riviera. Additional Skills (Considered a Plus): Expertise in synthesis and implementation processes. Proficiency in Tcl scripting for automation and tool customization. Experience with debugging and testing using tools like ILA (Integrated Logic Analyzer), SignalTap, or similar. Familiarity with embedded software development, including: Writing bare-metal C/C++ for testing Zynq firmware. Developing or customizing a complete PetaLinux OS. Soft Skills: Stro...
I'm looking for an experienced professional to help debug my Verilog code, Xilinx Vivado, FPGA; specifically focusing on UART communication related to data transmission. I'm currently at the final testing stage and encountering issues with incorrect data output. Key Requirements: - Expertise in UART communication, particularly in data transmission - Proficiency in Verilog coding - Experience in debugging and troubleshooting Verilog code - Ability to identify and resolve issues causing incorrect data output - Familiarity with simulation software such as ModelSim or Vivado
Title of the Article: IR Drop Analysis for RFID Mutual Authentication Protocol This article focuses on the complete process of laying out a Verilog code design using Astro and performing IR Drop analysis. It also discusses methods to reduce IR Drop. The Verilog code is divided into seven parts: one top module and six submodules. The tasks include: Layout Process: Perform the layout of the entire Verilog code using Astro. Floorplan and Chip Physical Implementation: Cover the chip’s physical design and implementation steps. IR Drop Analysis: Conduct full-chip static and dynamic IR Drop analysis at various stages of the physical implementation process using simulation results to identify hotspot regions. Optimization Methods: Analyze the causes of IR Drop h...
I'm seeking a skilled technical writer with a strong background in VLSI digital design to create an educational document aimed at intermediate learners. The document should focus on HDL (Verilog/VHDL) and provide clear, comprehensive explanations of the concepts, techniques, and applications pertinent to this area of digital design. Key Requirements: - In-depth knowledge and experience in VLSI digital design and HDL (Verilog/VHDL). - Proven technical writing skills, particularly in creating educational materials. - Ability to explain complex concepts in an accessible way for intermediate learners. The final document should be well-structured, engaging, and suitable for use as a teaching resource. The document should be between 25-50 pages.
I'm looking for a skilled engineer to develop a 5-port Network on Chip (NoC) router for IoT edge devices. This router should be coded in Verilog and be designed with low power consumption as the top priority. The router should handle 8-bit input data and be optimized for low power operation without compromising performance. Key Requirements: - Proficiency in Verilog with proven experience in coding for hardware implementations. - Deep understanding of low power design techniques in digital circuits. - Experience with designing network routers, particularly for IoT applications. - Capability to optimize for specific traffic patterns - in this case, handling 8-bit input data. If you have the required skills and experience, I look forward to receiving your bid.
I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices
I am seeking a freelancer to implement a traffic signal controller using the Altera DE2-115 board. The project is intended for educational demonstration purposes, so clear and effective design is crucial. Key Requirements: - Use of Verilog to program the board. - Implementation of a fixed-time sequence traffic signal pattern. - Inclusion of pedestrian crossing signals, which should be activated via the board's key button. - Utilization of the board's LCD screen to display the current signal state. Ideal Skills: - Proficiency in Verilog programming. - Experience with the Altera DE2-115 board. - Understanding of traffic signal patterns and controllers. - Ability to design for educational purposes.
I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices
...o The output of the DAC should reflect the ADC signal. Deliverables: 1. VHDL Code: o ADC Interface RTL (Parallel LVDS input handling). o DAC Interface RTL (CMOS output handling). o Processing logic to connect ADC and DAC. o Predefined signal for ADC data (either in the testbench or RTL). o Commented sections in the code to switch between predefined ADC data and real ADC input. 2. Constraints File: o Fully defined Vivado timing constraints for the ADC and DAC interfaces. o Pin Assignments XDC File 3. Testbench: o A functional testbench that simulates the ADC-to-DAC signal path. o Demonstration of signal processing logic (e.g., amplify ADC signal and output it via DAC). 4. Documentation: o Explanation of the VHDL design and logic. o Instructions for switching from prede...
I am searching for someone to help me with the following project. I hope you can help me. I need an APP optimized for Markov Chain Monte Carlo (MCMC) computations written in hardware description languages VHDL or Verilog for the AMD Alveo™ U50 Data Center Accelerator Card or similar other FDPA. The app should be as basic as possible, but it needs to outperform the top-performance CPUs such as Ryzen 9 7950x or IntelCore i9 14900K. AMD Alveo™ U50 Data Center Accelerator Card The app will be used for mining (PoW) activities for the Matrix AI Network project: From the MATRIX 1.0 White Paper, the recommended hardware for mining activities should focus on devices
I'm looking for a skilled engineer to design and implement an Arithmetic Logic Unit (ALU) using Verilog. This ALU will perform addition and subtraction of 16-bit Binary Coded Decimal (BCD) numbers on an ASIC platform. Key Requirements: - Design and implement the ALU to handle 16-bit BCD numbers. - Use Verilog for all design aspects. Ideal Skills: - Extensive experience with ASIC design and implementation. - Proficient in Verilog with a solid understanding of ALU design. - Knowledge of Binary Coded Decimal (BCD) arithmetic. The successful freelancer will help bring this project to fruition with their expertise in digital design and ASICs. The ALU should operate at a clock frequency of no requirements.
I need help in a project. All what I have to do is already given (manual). I need help to do the exercises given
I'm seeking an expert in ASIC synthesis utilizing the Fusion Compiler tool. The primary objective of this project is to optimize the performance of a custom logic digital design written in Verilog. Key Responsibilities: - Conduct synthesis of a custom logic design for optimizing performance. - Employ the Fusion Compiler tool for this task. - Deliver the project with a high level of precision and attention to detail. Ideal Skills and Experience: - Extensive experience with ASIC synthesis. - Proficiency in the Fusion Compiler tool. - Strong background in custom logic design. - In-depth knowledge of Verilog. - Excellent performance optimization skills.
I need a freelancer who can design an 8-bit up/down counter on an FPGA for me. This counter should be binary based and capable of interfacing with a 10MHz clock. Key Requirements: - Design an 8-bit binary up/down counter - Implement 'clear' and 'load' features - Synchronize with a 10MHz clock Ideal Skills: - Proficiency in FPGA development - Experience with digital ...FPGA development - Experience with digital circuit design - Familiarity with binary counter design The counter should interface with an LED display for output. Please use a Xilinx FPGA platform for this project. The counter should reset to zero. Please ensure the counter can load a value from an input signal. The counter should be controlled using button input for up/down counting. Please use Verilog...
I am seeking an experienced VHDL programmer to assist in the development of a digital circuit design for FPGA implementation. The project involves creating VHDL modules for a state machine-based system designed to generate and store Fibonacci numbers in RAM. The key components of this project include: Main FSM Controller: Develop a Finite State Machine (FSM) to manage the generation and storage of Fibonacci numbers, handling state transitions based on external inputs. Debouncer: Implement a debouncer module to stabilize the input signals from physical buttons, ensuring clean transitions and preventing bounce-related issues. Counter: Create a counter module that will provide address generation for the RAM, managing the read/write operations based on the FSM's state. R...
I'm seeking an expert in neuromorphic computing and coprocessor design for a university project. The primary deliverable is simulating the designed coprocessor using Verilog. Key project components include: - Designing a custom neuromorphic coprocessor tailored for the project. - Producing simulation results using Verilog. Ideal skills and experience for the job: - Extensive experience with Verilog and other simulation tools. (Xilinx vivado) - Proven track record of designing and simulating custom hardware. - Ability to deliver high-quality, detailed simulation results.
...involves debugging Verilog code from GitHub. Unfortunately, I'm encountering syntax errors throughout the code and I need a skilled professional who can assist me in identifying and fixing these issues. - Specific Tasks: Debugging Verilog code and resolving syntax errors - Ideal Skills: Proficiency in Verilog, strong debugging skills, familiarity with GitHub - Experience: Previous experience with Tiny Tapeout projects is a plus but not necessary - Conduct a thorough code review to identify potential issues. - Refactor the existing Verilog code for improved readability and maintainability. - Create and run additional test cases to ensure the code works correctly. - Integrate the corrected code into the project and run tests to verify overall functionalit...
...experienced FPGA Verification engineer to help with unit testing my existing Verilog code. The primary focus will be on conducting functional tests to ensure the integrity and performance of the code. Ideal Skills: - Proficient in Verilog with significant experience in FPGA software engineering. - Strong background in designing and implementing unit tests, specifically functional tests. - Familiarity with FPGA design and optimization. - Excellent problem-solving skills and attention to detail. Experience: - Proven track record of successful FPGA code testing. - Experience with Class C Software - Experience with writing code and unit test for medical devices - Experience with Verilog is essential, prior experience with VHDL or SystemVerilog is a plus. - F...
I am looking for a skilled professional with expertise in digital VLSI design and simulation-based verification. The primary focus of this project is on the design and verification of a digital VLSI circ...design and verification of a digital VLSI circuit. Ideal Skills and Experience: - Extensive experience in digital VLSI design. - Proficient in simulation-based verification methods. - Familiarity with various simulation tools and software. - Strong problem-solving skills and attention to detail. - Good communication skills to relay progress and challenges. - Proficiency in HDL languages like VHDL and Verilog. Key Responsibilities: - Designing a digital VLSI circuit. - Conducting thorough simulation-based verification. - Providing regular updates on progress and any challe...
I am looking for an expert in Verilog and Vivado to assist with our project. The primary goal is to conduct a power comparison of our sequential circuit architectures. Key Requirements: - Proficient in Verilog and Vivado - Experience with power analysis of sequential circuits - Ability to provide comprehensive reports on power consumption comparisons - Proficient in running simulations to test circuit performance The successful freelancer will help us understand the power consumption of our different architectures. Please include your experience with similar projects in your bid. The power comparison involves evaluating circuits that use flip-flops.
As discussed we need FPGA VHDL design for our ongoing projects
I'm looking for a Python expert to develop a package that automates the process of pulling VHDL code from a git repository, compiling it, running lint checks, simulating it, and generating documentation using custom scripts I've developed. Key features of the package should include: - Interfacing with a git repo to pull code - Using custom scripts for compilation, linting, simulation, and documentation - Outputting the results of simulations as log files Ideal candidate: - Extensive experience with Python - Familiarity with VHDL and git - Able to understand and work with custom scripts - Good understanding of software package development
I am looking for an expert in Verilog and Xilinx FPGA boards to help me with a project. The task involves controlling a servomotor based on the distance detected by an ultrasonic sensor. Essential Project Details: - The distance to be detected by the ultrasonic sensor falls within the medium range of 2 to 5 meters. - The control logic for the servomotor needs to be implemented in Verilog. Ideal Skills and Experience: - Proficiency in Verilog is mandatory. - Extensive experience with Xilinx FPGA boards is highly desirable. - Prior work with servomotor and ultrasonic sensor control is an advantage. - Ability to deliver a precise, reliable and efficient control system.
The Company is in need of a proficient VHDL designer experienced in FPGA development. The company has a lot of new projects, and several profiles are available - Junior VHDL designer: we pass the specs, you implement the VHDL, test in simulation and document modules - Senior FPGA Designer: you are in charge of the whole FPGA design, could be from specification to integration and testingon hardware (remotely). and also VHDL design, simulation and documentation Key Responsibilities: - Develop and implement VHDL code for FPGAs/SoC Ideal Skills and Experience: - Extensive experience with VHDL - Proficient in FPGA design (multi vendor is a plus) Opportunities: - fixed prices tasks for modules design is the first step - hourly contracts can follow aft...
I need a visually appealing menu page designed in Verilog for an OLED display. This menu will primarily be used to display user data, specifically preferences. The ideal freelancer for this project should have: - Extensive experience in Verilog programming - Prior work in designing for OLED displays - A strong eye for aesthetics and design - Ability to create intuitive and user-friendly interfaces Your main responsibilities will include: - Creating a menu page that is not only functional but also aesthetically pleasing - Ensuring the menu can effectively display user preferences Please provide examples of previous similar projects in your proposal.
I am seeking an experienced FPGA programmer to assist with controlling elements in a phased array, specifically ultrasound elements. The project requires programming in Verilog. Key Responsibilities: - Develop and implement Verilog-based control systems for ultrasound phased array elements using FPGA technology. - Collaborate with me to refine control strategies and ensure optimal performance. Ideal Skills: - Proficiency in Verilog and FPGA programming. - Prior experience with phased array element control, particularly with ultrasound elements. This project is pivotal in advancing our capabilities in ultrasound applications and I am looking for someone who can deliver high-quality, efficient solutions.
I need comprehensive VHDL documentation for my FPGA control board project, which involves 4 FPGAs and a test firmware. The primary goal of this project is to perform functionality testing. Key Requirements: - Extensive knowledge of VHDL and FPGA - Previous experience with circuit design and hardware simulation - Skills in technical writing and documentation The documentation should cover: - Circuit design of the control board - Details about the 4 FPGAs and their roles - Overview of the test firmware - Procedures and methods for functionality testing The goal is to create clear, concise and thorough documentation that will aid in understanding and using the FPGA control board.
We have RTL code of our Camera Interfacing architecture using verilog. To obtain GDSII file of same we need SDC file, script for CTS, dimensions of chip planning and also required files i.e. lib, lef,captable,QRC etc. (Technology- SCL 180nm)
I'm looking for a skilled Verilog professional who can help me with the following tasks: - Adding new functionalities to existing Verilog code: This primarily involves enhancing operations within the current framework. - Verification: Once the new functionalities are integrated, thorough testing will be necessary to ensure everything works as expected. Ideal skills for this job include: - Proficiency in Verilog, particularly in the area of code verification. - Prior experience with enhancing operations in Verilog code. - Strong problem-solving skills to troubleshoot and resolve any issues that arise during the verification process. If you have a track record of successfully completing similar projects, I would love to hear from you.
I need to acquire the data on my...ADC card to AX7035B. The task is quite simple. We need a FIFO to get the data and the FIFO need to communicate with Ethernet port on the board AX7035B to successfully transmit the data for logging into my PC. For this reason, the simulation behavior task has been completed, as attached. The same code can be synthesized and successfully generate the bit file. However, I am not an expert in FPGA/verilog debugging. Please note that it is a ready-made project and the freelancer has to make sure it successfully achieve my desired objective (i.e, I must get the data to get logged on my computer after receiving through FPGA ethernet port). I don't need any specialized software to display this data on my computer in real time. Just logged into a text ...
I need a skilled VHDL developer for implementing a CORDIC algorithm to compute the exponential function on a Xilinx Artix FPGA. Key Requirements: - Proficient in VHDL with a focus on high-performance computing. - Experience with CORDIC algorithm implementations. - Familiarity with Xilinx FPGA programming, particularly the Artix series. The end goal is a highly efficient and accurate CORDIC implementation capable of computing exponential functions for a variety of input ranges.
I'm on the lookout for a seasoned VHDL developer who can implement a CORDIC-based exponential function for scientific computing on a Xilinx FPGA. Key Requirements: - Expertise in VHDL programming - Proven experience with CORDIC algorithm implementations - Deep understanding of scientific computing needs - Familiarity and hands-on experience with Xilinx FPGA family - Ability to deliver reliable, efficient code Your role will be crucial in facilitating high-precision calculations, essential for scientific tasks. In-depth understanding of FPGA architecture and VHDL is paramount to achieve optimal performance. If you have a passion for working on cutting-edge technology and delivering top-notch solutions, I would love to hear from you.
...firmware using HDL (Verilog/VHDL) for PCIe-based DMA monitoring. Design, simulate, and test algorithms for real-time data processing on the FPGA. Interface the FPGA with the host system, ensuring seamless data transfer via PCIe. Optimize FPGA code for performance, power consumption, and resource utilization. Collaborate with hardware engineers to debug and validate FPGA functionality on the physical board. Write and maintain clear and detailed technical documentation. Work on performance tuning and integration of FPGA modules with embedded software. Required Qualifications: Bachelor’s/Master’s degree in Electrical Engineering, Computer Engineering, or related field. 3+ years of experience in FPGA programming, ideally with Xilinx FPGAs. Proficiency in HDL langua...
...troubleshooting complex hardware systems. Experience with hardware simulation tools such as ModelSim, Vivado, or equivalent for FPGA testing and validation. Deep understanding of PCB design and multi-layer board layouts, specifically for dense, high-performance systems. Proficiency with signal integrity tools and equipment (oscilloscopes, logic analyzers, etc.). Strong knowledge of FPGA architecture and VHDL/Verilog for FPGA development. Ability to work independently and collaboratively within a team environment. Excellent problem-solving skills and attention to detail. Nice to Have: Familiarity with high-speed communication protocols (e.g., PCIe, Ethernet, DDR). Experience with power integrity analysis and thermal management. Previous work with Xilinx development tools (V...
I'm looking for a skilled Verilog coder to help me build a transformer model for machine translation from English to Spanish. writting code as per architecture of the transformer Here's what you need to know: - The transformer model will specifically be used for machine translation. - A crucial part of this project is sourcing datasets for training the model. I currently do not have any datasets, so your ability to find suitable ones will be key. - Experience with NLP and Verilog is essential, and understanding of machine translation will be a significant advantage. Your expertise will help make this project a success. Looking forward to your bids.
I'm looking to add new instructions to my Verilog code which currently describes a processor. The main objective is to integrate logical operations, specifically an exclusive-OR immediate instruction. Ideal Skills: - Expert knowledge in Verilog and processor design - Experience in designing and implementing logical instructions - Familiarity with exclusive-OR operations and immediate instructions The goal is to enhance the current functionality of the processor by incorporating these new instructions in a seamless and efficient manner.
I'm looking for a skilled programmer with experience in Perl and Tcl to convert my existing Perl code into Tcl. The current code is used for analyzing VHDL code through regular expression file analysis. Key Requirements: - Proficiency in both Perl and Tcl - Knowledge of regular expression file analysis We have an AI converted starting version but the whole file conversion is not correct, so probably chekc line by line and testing for comparison is required
I'm new to Verilog and seeking help with the fundamentals, particularly in design coding. My current focus is on understanding module creation, state machines, and testbenches. Ideal skills and experience for the job: - Strong background in Verilog - Experience in teaching or tutoring - Patience and ability to explain complex concepts in simple terms - Good communication skills
please only get back at me if you have huge experience in these things. I am happy to hear from you! Thanks!
...FPGA-based digital circuits. Create and verify FPGA designs using hardware description languages (HDLs) such as Verilog or VHDL. Collaborate with hardware and software teams to integrate FPGA designs into larger systems. Test and debug FPGA designs to ensure proper functionality. Document FPGA designs and test results. Provide FPGA input during the PCB hardware design phase. Assist in performance testing and optimization of FPGA designs. Requirements: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Minimum of 3-5 years of experience in FPGA design and development. Proficiency in hardware description languages (HDLs), such as Verilog or VHDL. Experience with FPGA design tools and simulators, such ...
Assalam o alaikum, its Muhammad Javed here an electrical & electronics engineer. I am looking for electrical engineers to be a part of my team. I have regular flow of work and already I have a team of professionals and now I am finding more p...professionals to provide me their services in the field of electrical engineers. I need freelancers having firm command over following domains Electric Circuit Design Control System Design Power System Design Image Processing Adaptive Systems Embedded Systems We mostly deal with following software's/hardware's MATLAB/SIMULINK Proteus Multisim PIC Microcontroller Arduino / ESP32 FPGA/VHDL Applicant should be proficient in writing technical FYP reports. Feel free to place your bid if you have expertise in any of ...
I'm looking for a talented VHDL expert who can design a file for the SHA-256 algorithm for an ASIC chip. The primary use case for this algorithm in my project is data encryption. Key Requirements: - Design the SHA-256 algorithm in VHDL - Prioritize processing speed in the chip design - Use a structural VHDL coding style Skills & Experience: - Proven experience in VHDL coding - Deep understanding of the SHA-256 algorithm - Previous work in ASIC chip design - Strong focus on processing speed - Familiarity with structural VHDL coding style
