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    314 vlsi freelance Gefundene Jobs, Preise in EUR

    Hi, I have a Flash 6 bits ADC, would like to attempt to make a 12 bits ADC, can you help me to achieve it ?

    €108 (Avg Bid)
    €108 Gebot i.D.
    16 Angebote

    This is pavan. I am from the VLSI industry. I need a technical writer to explain 3 subjects(digital electronics, Verilog, and VHDL).

    €105 (Avg Bid)
    €105 Gebot i.D.
    17 Angebote

    I need to develop shell script for EDA Tool in VLSI domain

    €69 (Avg Bid)
    €69 Gebot i.D.
    13 Angebote

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    €153 (Avg Bid)
    €153 Gebot i.D.
    12 Angebote

    Front End VLSI Design engineer Part Time in Bangalore Looking for expert FPGA Design engineer with RTL Design [Verilog] Proven track record of designing, developing, prototyping, and testing high speed FPGA designs Experience in Verilog programming & experience with Xilinx devices and development tools Design Simulation experience [Modelsim] Candidate

    €130 (Avg Bid)
    €130 Gebot i.D.
    4 Angebote
    VLSI EDA Cadence Beendet left

    RISC-V CPU chip high performance low power -- run EDA tools to generate GDSII synthesis and place and route

    €32 / hr (Avg Bid)
    €32 / hr Gebot i.D.
    14 Angebote

    ...relates to vs1005 (All in one audio player on a chip) [Zur Anzeige der URL Anmelden] by [Zur Anzeige der URL Anmelden] in combination with the developer board. Programs are written using VLSI Solution's Integrated Development Environment VSIDE [Zur Anzeige der URL Anmelden] We are coding a VS1005 and want to use a stepper motor as an encoder with

    €113 (Avg Bid)
    €113 Gebot i.D.
    3 Angebote

    An existing algorithm is available, apply it and get the results. Then make minor changes in it for improvement and get the results

    €53 (Avg Bid)
    €53 Gebot i.D.
    5 Angebote
    SD Pro Solutions Beendet left

    ...Development, Course Designing, Training, and placement guidance, based at South India. SD Pro providers Training and Projects in Embedded systems, VLSI, Matlab, Power systems, Power Electronics, DSP/DIP, VLSI, .Net, Java/J2EE /Android, Mechanical Design and Fabrication as well as develops its own range of quality Embedded products. SD Pro has successfully

    €249 (Avg Bid)
    €249 Gebot i.D.
    4 Angebote

    Please find the document in the attachments. Solve the problems step by step with the given data/parameters and please mention all the steps clearly and specify the units for each and every step correctly and make sure the calculation is perfect. For the first question please draw the circuit diagram on a paper and attach it with the solutions and please make sure all the solutions are in WORD doc...

    €76 (Avg Bid)
    €76 Gebot i.D.
    5 Angebote

    Based on my current design of CDS active pixel, I'd like to have it extended in order to make an implementation of CMOS Image Sensors of array 512x512 at least. You need to make a proof of concept and make simulations of it. We'll use Cadence Virtuoso 6.17

    €192 (Avg Bid)
    €192 Gebot i.D.
    6 Angebote
    Data Collection Beendet left

    ...Assistant Prof working Microprocessor Design (if they have someone working in this area) • Professors Assistant Prof working VLSI Design (if they have someone working in this area) • Professor Assistant Prof working in CAD tools for VLSI Design (if they have someone working in this area) • Professor Assistant Prof working in Software area for Hardware Designs

    €112 (Avg Bid)
    €112 Gebot i.D.
    46 Angebote
    VLSI Trainer Beendet left

    We are looking for an experienced Freelancer trainer who can train on VLSI in Bangalore. The curriculum will be provided by the company for the same.

    €666 (Avg Bid)
    €666 Gebot i.D.
    11 Angebote

    Hello, I have made a SAR 8 bits binairy coded ADC using method of 2 steps Successive Approximation, but it is a bit buggy. I need very experienced engineer in this field, otherwise it would just be loosing time. The simulation must be done in Cadence Virtuoso 6.x Thanks !

    €35 (Avg Bid)
    €35 Gebot i.D.
    2 Angebote

    Design and optimization of low power VLSI circuits for Leakage power reduction using Clock Gating with GSA

    €169 (Avg Bid)
    €169 Gebot i.D.
    4 Angebote

    ...tracking device for a specific application. I am seeking a solution that is an android and IOS application that is designed to track and locate a sensor (IOT, GPS, RF or other VLSI) technology that is embedded within a projectile that is no larger than 1.68-inches (42.7mm) in width, height and length. The IOS and Android applications should be able to

    €276 (Avg Bid)
    NDA
    €276 Gebot i.D.
    20 Angebote

    I want to parse a log file and use regexp to filter some patterns and put them in output log file. I have the script. 1- put the -p and -ig inside text files and feed it to code. like this: [Zur Anzeige der URL Anmelden] -i [Zur Anzeige der URL Anmelden] -o [Zur Anzeige der URL Anmelden] -p [Zur Anzeige der URL Anmelden] -ig [Zur Anzeige der URL Anmelden] [Zur Anzeige der URL Anmelden] is: warnin...

    €94 (Avg Bid)
    €94 Gebot i.D.
    5 Angebote

    Design and optimization of low power VLSI circuits for Leakage power reduction using Clock Gating with GSA

    €160 (Avg Bid)
    €160 Gebot i.D.
    7 Angebote

    Project description is under: [Zur Anzeige der URL Anmelden] Will provide a good reference as well.

    €31 (Avg Bid)
    €31 Gebot i.D.
    5 Angebote

    Sequential Circuit Design Look at the project description, zip files have the actual images. Also attached a reference.

    €29 (Avg Bid)
    €29 Gebot i.D.
    5 Angebote

    Sequential Circuit Design Look at the project description, zip files have the actual images. Also attached a reference.

    €13 - €22 / hr
    €13 - €22 / hr
    0 Angebote

    I need help in VLSI coding language, micro controller , C++ and C

    €367 (Avg Bid)
    €367 Gebot i.D.
    8 Angebote

    Vlsi project on excel

    €20 (Avg Bid)
    €20 Gebot i.D.
    4 Angebote
    magic VLSi Beendet left

    ...schematic of a CMOS 3-input XOR gate. 1- Size the transistors Use the smallest integer widths to achieve ratio of 1(i.e. equal rising and falling resistances) 2- Use Magic VLSI layout tool to Design your layout of the sized design then use irsim to simulate your design (all combinations of input A,B,C). The report should include the following.

    €34 (Avg Bid)
    €34 Gebot i.D.
    5 Angebote
    VLSI homework Beendet left

    everything is clear in the PDF .................................................................................................................................................................................regards

    €43 (Avg Bid)
    €43 Gebot i.D.
    1 Angebote

    i need 3 to 4 papers review for the paper with brief explanation which is related to VLSI electronics

    €141 (Avg Bid)
    €141 Gebot i.D.
    2 Angebote

    Vlsi , clewin program

    €149 (Avg Bid)
    €149 Gebot i.D.
    5 Angebote

    Build a basic building block of the Carry-Skip adder and test it for functionality in LTSpice. Description is in: [Zur Anzeige der URL Anmelden] Reference: [Zur Anzeige der URL Anmelden]

    €24 (Avg Bid)
    €24 Gebot i.D.
    9 Angebote

    Aim is to design a successive approximation register based analog to digital converter using cadence tool (any vlsi back end tool)

    €828 (Avg Bid)
    €828 Gebot i.D.
    8 Angebote
    Logo Design Beendet left

    ...Indian Defence and production agencies. Setup by an experienced team of engineers from the industry to carry-out research, design, development and manufacturing in the field of VLSI and Embedded systems. PCB services from the initial stage of Conception to last stage of Manufacturing and Production are provided with a desire to bring the best within us

    €30 (Avg Bid)
    €30 Gebot i.D.
    20 Angebote

    VLSI developer expertise enhanced in optimization concepts are required

    €444 (Avg Bid)
    €444 Gebot i.D.
    7 Angebote

    Firstly I would need a project suggestion for a masters project in VLSI testing and verification using Synopsis EDA tools for sequential circuits, because I have to submit a project proposal. Once a project suggestion seems acceptable, I will need help in finishing the project with desired outputs and compare the same with FPGA implementation. By bid

    €514 (Avg Bid)
    €514 Gebot i.D.
    9 Angebote
    Vlsi project Beendet left

    I need some one has background about VLSI

    €78 (Avg Bid)
    €78 Gebot i.D.
    8 Angebote

    I need help in my company project (more details will be share with shortlisted candidate) You have to be very good in MIPS assembly language RTL, verilog, and basics VLSI technology to be shortlist you have to solve one MIPS Asm. question (attached below) as soon as possible.

    €842 (Avg Bid)
    €842 Gebot i.D.
    5 Angebote

    I am going to do my research so I need useful research ideas in electronics, electrical, IT domains and those who have research ideas in VLSI , Embedded systems, Finfet technology, Drones bid me.

    €56 (Avg Bid)
    €56 Gebot i.D.
    14 Angebote

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    €18 (Avg Bid)
    €18 Gebot i.D.
    6 Angebote
    Suggest a topic Beendet left

    Looking for project topics in VLSI testing and verification using Synopsis EDA tools and TETRAMAX for sequential circuits. Once a topic has been selected, I would need help in finishing the project with desired outputs. Finally, I would also need an explanation of the functioning after completing the project.

    €366 (Avg Bid)
    €366 Gebot i.D.
    9 Angebote

    Multiplier cell design with the application of 8X8 multiplier, related to VLSI design (very large scale integration). required : some report corrections in chapter 1 and 2 regarding the references and report writing. I have a attached a copy of the report and a paper specifying the corrections.

    €20 (Avg Bid)
    €20 Gebot i.D.
    4 Angebote

    I need you to develop some software for me. I would like this software to be developed for Windows using Python. floor planning of vlsi module , I have to optimise it using Patrical swarm algorithm , need gui for it It requires 1. formation of model ,i.e placement of [Zur Anzeige der URL Anmelden] with a big block 2. if there are 4 block within a big block then there

    €160 (Avg Bid)
    €160 Gebot i.D.
    4 Angebote

    An efficient Glitch power reduction using sequential clock gating in VLSI circuits

    €157 (Avg Bid)
    €157 Gebot i.D.
    7 Angebote

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    €151 (Avg Bid)
    €151 Gebot i.D.
    2 Angebote

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    €26 - €217
    €26 - €217
    0 Angebote

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    €481 (Avg Bid)
    €481 Gebot i.D.
    5 Angebote
    VLSI technologia Beendet left

    I need you to write a research article . About VLSI technologia

    €33 (Avg Bid)
    €33 Gebot i.D.
    9 Angebote

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    €157 (Avg Bid)
    €157 Gebot i.D.
    5 Angebote
    CMOS VLSI PROJECT Beendet left

    c Integrated Circuit (ASIC) implementation of an N x N array multiplier. The ASIC will be fabricated in AMI 0.5 m CMOS technology available through MOSIS.

    €96 (Avg Bid)
    €96 Gebot i.D.
    1 Angebote
    COMS VLSI PROJECT Beendet left

    NxN array multiplier to be designed using cadence

    €26 - €217
    €26 - €217
    0 Angebote

    A structural methodolgy for scan based design cells with efficient power dissipation methods

    €26 - €217
    €26 - €217
    0 Angebote
    vlsi project Beendet left

    the tool required to be used is l-edit software

    €192 (Avg Bid)
    €192 Gebot i.D.
    4 Angebote
    DMDG mosfet Beendet left

    ...Analysis and comparative study of the electrical characteristics of DMDG MOSFETs with that of conventional SOI MOSFETs has been done. DMDG MOSFETs has become a important part of VLSI research. An analytical model is developed using ATLAS simulator to analyze short channel effects (SCE),threshold voltage, potential [Zur Anzeige der URL Anmelden] structure was designed

    €8 - €20
    €8 - €20
    0 Angebote