Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Verilog / VHDL Designers anheuern

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    create HDL file -- 3 6 Tage left
    VERIFIZIERT

    Produce an implementation, in HDL, of the described Feistel encryption scheme. The chip should have the following preamble.

    €21 (Avg Bid)
    €21 Gebot i.D.
    3 Angebote
    Hardware systems and control -- 4 6 Tage left
    VERIFIZIERT

    Hardware systems and control. I need someone to help me look at a paper in order to complete a project.

    €116 (Avg Bid)
    €116 Gebot i.D.
    1 Angebote

    Hardware control and system (VHDL).I will share more details in chat.

    €47 (Avg Bid)
    €47 Gebot i.D.
    3 Angebote

    Clock Domain Crossing (CDC) in VLSI

    €71 (Avg Bid)
    €71 Gebot i.D.
    3 Angebote
    I need FSM diagram in 4 hours 5 Tage left
    VERIFIZIERT

    I need FSM diagram for this problem Problem Description: you required to develop an elevator controller. The problem is limited to designing the internal buttons of an elevator and it is described below. 1. The number of served floors is at least six floors. 2. When the desired floor is selected, the elevator should move to this floor. This is indicated by the direction, and the floor number di...

    €21 (Avg Bid)
    €21 Gebot i.D.
    5 Angebote

    Need an expert in assembly and CPU on FPGA

    €63 (Avg Bid)
    €63 Gebot i.D.
    3 Angebote

    we want a efficient 8-point fft verilog code which can be synthesized and connected to AXI-4 bus which can act as an hardware accelerator to the existing risc-v.

    €93 (Avg Bid)
    €93 Gebot i.D.
    1 Angebote

    Implement the mirror adder shown in Figure 1 in 18-nm FinFET GPDK. Make sure to properly size the FinFETs. a. Simulate the mirror adder to determine delays from inputs to the sum and carry out. b. Characterize power dissipation for the fastest data rate this adder can handle. 2) Using the adder implemented in part (1) implement a 16-bit carry-ripple adder. Simulate your 16-bit carry-ripple adder a...

    €126 (Avg Bid)
    €126 Gebot i.D.
    3 Angebote

    I need Mealy FSM state diagram for 10$-15$ Problem uploaded

    €15 (Avg Bid)
    €15 Gebot i.D.
    5 Angebote
    I need FSM diagram urgent 5 Tage left
    VERIFIZIERT

    I need FSM diagram for given problem urgent

    €48 (Avg Bid)
    €48 Gebot i.D.
    5 Angebote

    Image processing on FPGA using [Zur Anzeige der URL Anmelden] a image and do threshold operation like this

    €56 (Avg Bid)
    €56 Gebot i.D.
    3 Angebote
    I need Digital logic design tutor 4 Tage left
    VERIFIZIERT

    I need Digital logic design tutor

    €19 (Avg Bid)
    €19 Gebot i.D.
    16 Angebote
    VHDL Expert 3 Tage left
    VERIFIZIERT

    VHDL Expert VHDL Expert VHDL Expert

    €16 (Avg Bid)
    €16 Gebot i.D.
    4 Angebote

    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    €170 (Avg Bid)
    €170 Gebot i.D.
    3 Angebote
    HDL Programmer Needed 3 Tage left
    VERIFIZIERT

    HDL Programmer Needed soon......

    €20 (Avg Bid)
    €20 Gebot i.D.
    4 Angebote

    I have a module I need to add uncertanity to it to see its output

    €35 (Avg Bid)
    €35 Gebot i.D.
    5 Angebote

    I need a working code in Verilog that is able to successfully simulate, synthesize and generate bitstream on Xilinx Vivado for FPGA. The code should be able to implement a Convolutional Neural Network and take as input weights and biases from a pretrained model in Python and then use them to identify the 28x28 pixel test image from a MNIST database. Whatever digit is identified by the code, releva...

    €240 (Avg Bid)
    €240 Gebot i.D.
    11 Angebote

    Hello. I need an Assembly MIPS Expert right now. Will provide details on pv.

    €30 (Avg Bid)
    €30 Gebot i.D.
    4 Angebote

    Hi I need engineers who can program in stm32 microcontroller...

    €286 (Avg Bid)
    €286 Gebot i.D.
    18 Angebote

    I need help to Create a skip instruction using VHDL. I will discuss more in chat.

    €25 (Avg Bid)
    €25 Gebot i.D.
    2 Angebote

    Timers and Input Captures needed within a week

    €21 (Avg Bid)
    €21 Gebot i.D.
    7 Angebote
    vhdl program -- 2 2 Tage left
    VERIFIZIERT

    • Make the Memory Map for the following configuration • 1 microprocessor 16 bits addresses • 1 Eprom (16 bits) and a RAM (16 bits) • 9 sensors described in the attached tables • 3 actuators described attached Indicate the addresses in Hexadecimal for each object • Make the VHDL code for the selection of objects • Draw the diagram (processor and other circuits)

    €202 (Avg Bid)
    €202 Gebot i.D.
    8 Angebote

    Hi! I want to deploy a custom RISC-V processor on FPGA. There are two tasks: 1. Deploy the core to run C codes on it and blink an LED (the core is implemented in Verilog and synthesizable). 2. Boot Linux Kernel (files are ready). I want to deploy the processors on the ZCU102 Zynq MPSoC Board (Zynq UltraScale) FPGA.

    €391 (Avg Bid)
    €391 Gebot i.D.
    7 Angebote

    I need someone fix verilog code and run it in nexys 2

    €19 (Avg Bid)
    €19 Gebot i.D.
    3 Angebote

    I need someone who can fix verilog code and run it in nexys 2

    €31 (Avg Bid)
    €31 Gebot i.D.
    4 Angebote

    Este un proiect pentru facultate. Termenul este 17 mai 2021. Cerința detaliată a proiectului este în imagine. Mi-ar trebui documentația care să cuprindă cutia neagră a circuitului, descompunerea în Unitate de control și Unitate de Execuție, o listă cu resursele pe care le voi volosi (ex: generator de numere aleatoare), organigrama, implementare in VHDL și o schema logică pentru că prez...

    €69 (Avg Bid)
    €69 Gebot i.D.
    1 Angebote

    I need someone who can fix verilog code and run it in nexys 2

    €15 (Avg Bid)
    €15 Gebot i.D.
    3 Angebote

    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    €16 (Avg Bid)
    €16 Gebot i.D.
    1 Angebote

    SECURED PORTABLE ECG MONITOR FOR HIGH SENSITIVE PATIENT DATA PROTECTION USING AES ALGORITHM I need an AES encryption and decryption in C . Then I need to apply in FPGA to encrypt and decrypt an ECG signal data The input data will be an ECG signal ya Advanced Encryption Standard coding in C programming

    €8 - €25
    €8 - €25
    0 Angebote
    ASIC Verification Engineers 23 Tage left
    VERIFIZIERT

    Seeking full-time experienced ASIC Verification Engineers for an ongoing project (12 months+) Essential requirements: Knowledge of at least one industry standard protocol like Ethernet, PCIe, MIPI, USB, AMBA or similar. Ability to update testbench components like reference model/SB, drivers and monitors. Team player with excellent interaction skills. Perl/shell scripting is a good to have. ...

    €12 - €20 / hr
    Versiegelt NDA
    €12 - €20 / hr
    23 Angebote