Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Verilog / VHDL Designers anheuern

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    6 Gefundene Jobs, Preise in EUR

    We are signal processing company based out of Hyderabad. We provide turnkey solutions to challenging requirements in signal processing. We are developing a transmitter with digital modulation schemes with shorter delivery time. We developed all the algorithms required in LabVIEW FPGA. The same have to be ported to VHDL and be integrated before programming the Xilinx V6 FPGA on the transmitter. ...

    €748 (Avg Bid)
    Lokal
    €748 Gebot i.D.
    7 Angebote

    AD7147-1 (i2c) i need from expert answer for some questions. * please just make a offer if you have advance knowloagde with these is these is project only for expert which can answer some questions and after if look like you can help to join project. project make spi interface 7147 to eeprom read data and write over to new cap ic

    €19 / hr (Avg Bid)
    €19 / hr Gebot i.D.
    8 Angebote

    I have my working model of neural network. I want to develop an accelerator on FPGA and show improvement in power.

    €456 (Avg Bid)
    €456 Gebot i.D.
    28 Angebote

    I am looking for engineers who can design an internet connected coin counting machine using commonly available sensors and equipment in India at the lowest possible cost.

    €9 / hr (Avg Bid)
    €9 / hr Gebot i.D.
    7 Angebote

    Snake Game : 1.) Should run on Altera DE2 Board or on basy3 . 2.) Should Support VGA. 3.)Needed in a 3 days. skills:- verilog software:vivado i need this project in verilog and not in VHDL

    €68 (Avg Bid)
    €68 Gebot i.D.
    5 Angebote
    Task on verilog 3 bit ALU 21 Stunden left
    VERIFIZIERT

    Task on verilog 3 bit ALU Deadline 1 day Amount USD 40

    €49 (Avg Bid)
    €49 Gebot i.D.
    21 Angebote