Electrical Engineering FPGA

Geschlossen Veröffentlicht vor 4 Jahren Bezahlt bei Lieferung
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Hi, I have put together a project for Zynq Zedboard and am not very experienced with FPGA/Vivado. My problem currently is I have many warning on synthesis and removal of some registers so I need some help with issues I am having. The custom IP is a frequency counter with an AXI4 Full bus to the PS as well as an AXI Lite from the PS for configuration. I'm hoping to get to the stage of reading and writing from the PS for now

Elektrotechnik Elektronik Microcontroller Verilog / VHDL Schaltplan-Design

Projekt-ID: #22604754

Über das Projekt

5 Vorschläge Remote Projekt Aktiv vor 4 Jahren

5 Freelancer bieten im Durchschnitt $13/Stunde für diesen Job

shaitobikon

Hi, I can provide you support with this project. I have more then 10 years of experience working with FPGAs. Contact me and we'll discuss your needs.

$15 USD / Stunde
(5 Bewertungen)
3.1
JamesSmith2018

Dear client By creating a cooperative and inspirational working culture, I motivate myself not only to write code and implement software, but also to find solutions to clients business problems. I always have the oppo Mehr

$12 USD / Stunde
(0 Bewertungen)
0.0
mustafabugraavci

Hello Employer When I was Electrical engineering student I always did projects like this. I have approx one year example for fpgas. If you choose me you'll never regret.

$12 USD / Stunde
(0 Bewertungen)
0.0
ibnuhasan

Totally Having 10 years Experience in ASIC/FPGA and Physical Design, let me understand your requirement and then will work on it.

$12 USD / Stunde
(0 Bewertungen)
0.0