VLSI Design Engineer - Part Time - 20/09/2018 08:19 EDT

Front End VLSI Design engineer Part Time in Bangalore

Looking for expert FPGA Design engineer with RTL Design [Verilog]

Proven track record of designing, developing, prototyping, and testing high speed FPGA designs

Experience in Verilog programming & experience with Xilinx devices and development tools

Design Simulation experience [Modelsim]

Candidate should be familiar with solving IEEE research papers, algorithms, architectures using VerilogHDL.

Fähigkeiten: Elektronik, FPGA, Verilog / VHDL

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Über den Arbeitgeber:
( 0 Bewertungen ) Bengaluru, India

Projekt-ID: #17806358

3 Freelancer bieten im Durchschnitt ₹10741 für diesen Job


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