FPGA verilog project

Please read PMB

Hi! I have three years experience in vhdl and verilog designing and I did a one year course of such a project in my last year of Electrical Engineering of bachelors. I'll provide you a sample of my project in a day or two. Thank you.

Hi, I have 3 years of experience designing models for FPGA implementation. I have worked on my last year of college with XILINX and MODELSIM. Id interested, please send me more details.

Please check PMB

please give me a chance to do it

Bid and timeframe depend on the project. 30 days is the maximum

Hi, I have interest on this project. Please check your PMB.

Please see PM

Sir please Give me chance to do that i have Currently Developed and Architecture which is in process of ASIC design

Hello sir, I am opened for discussion and negotiation regarding this project. I offer you my experience which consists of 4 years of ASIC & FPGA designs. I have work experience in almost all of the stages of the implementation flow for both ASIC and FPGA (RTL coding in Verilog/System Verilog or VHDL, behavioral and gate-level simulation, static timing analysis and optimization, place & rout optimizations, DFT, etc...). Besides I have hands-on experience in areas as video processing, DSP, and mixed-signal designs. For projects with a higher complexity I can bring in between 2-4 peoples with the same amount of experience. Regards Vasile T.

Hi, I have more than 5 years FPGA/Verilog/VHDL hands-on experience. Have applied FPGA technology to telecommunication, video processing and industry control field in both IP and system level. Hope I can win this bid.

Please see your PM

I have two years experience in FPGA design and simulation by using Altera and Modelsim tools, respectively

I have a very good experience in working with Verilog and FPGAs. I have done a lot of projects in those fields.