De2 115 spi verilog Jobs

Jobposition: Country Acquisition Manager Arbeitsbeschreibung: Wir suchen zum nächstmöglichen Zeitpunkt engagierte Country Acquisition Manager für neue Franchise-Partner (Immobilienmakler, Immobilienverwalter und Unternehmer) für unser Immobilien-Franchise-Geschäft Real Estate Matching – Real Estate Matchin24 in mehr als 115 Ländern. Real Estate Matching – Real Estate Matching24 ist eine Full-Service-Immobilienagentur. Wir verkaufen und vermieten jede Art von Immobilien im Wohn-, Gewerbe- und Ferienimmobilienbereich. In denselben Branchen sind wir auch in der Immobilienverwaltung tätig. Darüber hinaus bieten wir die Dienstleistungen Vermittlung von Finanzierungen, Immobilienversicherungen und Immobilienbewertungen an. Weitere Info...

Jobposition für Franchise-Partner Position: Franchise-Partner Real Estate Matching – Real Estate Matching24 Wir suchen engagierte Franchise-Partner (Immobilienmakler, Immobilienverwalter und Unternehmer) für unser Immobilien-Franchise-Geschäft Real Estate Matching – Real Estate Matchin24 in mehr als 115 Ländern. Real Estate Matching – Real Estate Matching24 ist eine Full-Service-Immobilienagentur. Wir verkaufen und vermieten jede Art von Immobilien im Wohn-, Gewerbe- und Ferienimmobilienbereich. In denselben Branchen sind wir auch in der Immobilienverwaltung tätig. Darüber hinaus bieten wir die Dienstleistungen Vermittlung von Finanzierungen, Immobilienversicherungen und Immobilienbewertungen an. Weitere Informationen finden Sie unter...

wir suchen einen Übersetzer (m/w/d) zur Übersetzung eines Briefs an eine Behörde mit 115 Wörtern von Deutsch auf Französisch.

Firmware-Entwicklung auf einem STM32 Cortex-M4 Prozessor (zB STM32F429). Es soll der bidirektionale Datentransfer von einer UART Schnittstelle auf Ethernet abgebildet werden (UART-Ethernet Bridge). Zudem sollen die Daten von 4 AD-Kanälen auf Ethernet UDP abgebildet werden. Erforderliche Kenntnisse: - STM32 Eco-System inklusive STM32CubeMX - Entwicklungsumgebung STM32CubeIDE - FreeRTOS - LWIP-Stack - UART, SPI, I2C auf STM32 - Speichern von Konfigurationsparametern im Flash - Firmwareupdate über UART Weitere Aufgabenfelder im Bereich der Mikrocontroller-Entwicklung in langfristiger Zusammenarbeit möglich

Kann mir jemand helfen dieses Verilog Problem zu lösen?

...Gummi und Wachs. H. 68 B. 50 T. 35 cm DIAMANTE Italienische klassische Kommode aus Holz Frisierkommode im italienischen Stil (Epoca Transizione) Modell "DIAMANTE" in Bois de rose. Schubladen mit Schwalbenschwanzverbindung. Politur mit Schellack und Bienenwachs. H. 94 B. 115 T. 52 cm GRECA Italienische klassische Kommode aus Holz Frisierkommode im italienischen Stil (Epoca Transizione) Modell "GRECA" in Olivesche Bruyere Wurzelholz and Walnuss. Schubladen mit Schwalbenschwanzverbindung. Politur mit Gummi und Bienenwachs H. 94 B. 115 T. 52 cm LIMOGES Vitrine aus Holz mit Einlegearbeiten im Louis XVI-Stil Vitrine mit Einlegearbeiten im Louis XVI-Stil Modell "LIMOGES" in Bois de rose, Rosenholz, Ahorn, Pekia. Politur mit Schellack und Bienenwach...

Wir suchen Experten als Zuarbeit für ein audiotechnisches Projekt. Für unseren µ-Controller STM32F205 (ARM7-Core) benötigen wir eine Routine, die eine vorliegende MP3-Datei in eine WAVE-Datei konvertiert. D...Projekt. Für unseren µ-Controller STM32F205 (ARM7-Core) benötigen wir eine Routine, die eine vorliegende MP3-Datei in eine WAVE-Datei konvertiert. Die maximale Länge der MP3 Datei beträgt 1 Mbyte. Auf dem Mikrocontroller stehen nur 120 MHz Rechenleistung , 256 kByte Flash und 128 KByte RAM zur Verfügung. Die MR3-Datei wird entweder segmentweise dekodiert oder aus einem externen Flash mit 64MB über SPI geladen. Die fertige Datei wird im externen Flash schlussgelagert. Wer hat Erfahrung in der Konvertierung einer solche...

...Tag, ich habe eine xml-Datei die ich mit PHP bearbeiten möchte. Anbei ein Beispiel der XML-Datei: ________________________________________ <Vorname>Patrick</Vorname> <Name>Stieger</Name> <Sperre>0</Sperre> <Geworben/> </LoginDetail> <Bezahlt> <OrderID>368695409</OrderID> <Bezahlt>JA</Bezahlt> <Zeitpunkt>2015-07-13 17:32:31</Zeitpunkt> </Bezahlt> <Frageboegen> <Fragebogen ID="115"> <ID>115</ID> <Produktbezeichnung>Testprodukt 1</Produktbezeichnung> <Status>Angelegt</Status> <Gutschrift>5</Gutschrift> <Gutscheincode>E1hVJq2GkN</Gutscheincode> </Fragebogen> <Frageb...

finaler Funktionstest der gefertigten Baugruppe (BLT) zur Feststellung, ob alle extern an den µC angeschlossene Interface-Hardware bis zur Kundenschnittstelle (Stecker) vollständig funktional ist. Flashen mit Testprogramm, einfache ASCII Kommandos und Status-Abfrage aller I/Os (digitale Ein- und Ausgänge; interner A/D-Wandler, Echtzeituhr (SPI-Bus), externer AD-Wandler (SPI-Bus), Ethernet Schnittstelle, USB-Schnittstelle

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...to easily create that authentic birria taste, this packet combines ease of use with a richness of flavors, transforming any cut of meat into a birria flavored masterpiece." -"Ingredients: Ancho, chipotle morita, Mexican oregano, de arbol, garlic, onion, mesquite salt, brown sugar, tomato, coriander, cinnamon, allspice, and celery seed" - "Expiration Date: June 2026" - "Crafted by La Cabra Roja,115 College St E, Fayetteville, TN 37334 " - "SEE RECIPES AT " - "Instant Birria Consumé Mix" - All Natural Ingredients & Authentic Taste - Optional: "Quick and Easy" Unleash the Authentic taste of Mexico with Instant Birria -Instructions: "Combine one La Cabra Roja Instant Birria packet, four cups of...

...firmware development for a specific STM32 microcontroller model. - Application/Use Case: While not specified, the project likely involves a real-world application within the realm of consumer electronics, industrial automation, or wearable devices. Skills & Experience: - Prior experience with STM32 microcontrollers is essential. - Proficiency in utilizing various communication protocols (e.g. UART, SPI) and integrating sensors would be a plus. - Familiarity with power management techniques is highly desirable. - Experience with the specific STM32 model is needed to ensure optimal performance and compatibility. - A background in the chosen application domain (consumer electronics, industrial automation, or wearable devices) would be beneficial. If you've worked on sim...

I'm in need of a Verilog expert proficient with Quartus Prime Toolchain. Key Requirements: - Professional with Verilog: Need someone experienced in designing digital circuits and implementing specific functionalities using Verilog. - Proficiency with Quartus Prime: Familiarity with the Quartus Prime Toolchain is a must. I need to design, simulate, implement and test a digital circuit using the Quartus Prime toolchain as per the specifications I will provide and demonstrate the workflow when using the Verilog HDL to construct a design for a physical Field Programmable Gate Array (FPGA) target. Please apply if you have the required expertise. No teams or companies please.

...microcontroller. The ideal candidate should have: - Proficiency in Wiznet development - Proficiency in STM32 development - Extensive experience with Ethernet connectivity - Understanding of data transfer speeds and protocols. - STM32 and W5500 modules at hand Your job will be to write an optimal code, preferably in STM32CUBEIDE or Keil MDK Arm. The Wiznet W5500 is connected to STM32 via SPI, it should connect to ethernet router with DHCP mode and afterwards establish and maintain a websocket connection to public domain, sending and receiving data. The code should be clear, well commented and easily readable-reusable. The devices used are STM32F103C8 and Wiznet W5500. Please, make your bid indicating your understanding of the project, and your proposed timeline for compl...

We are looking for an experienced freelancer to create a custom DMA firmware using this simple guide : The guide provides detailed instructions, but I lack the time to complete it myself. The project will be executed on a Squirrel 35t board and should not take more than 3-4 hours for s...complete it myself. The project will be executed on a Squirrel 35t board and should not take more than 3-4 hours for someone proficient. **Tasks:** - Configure and customize firmware based on pcileech-fpga - Use Vivado for development - Emulate TLP and configure the configuration space **Required Skills:** - FPGA design and programming - Experience with Vivado (Xilinx) - DMA firmware development - Verilog/VHDL programming - Debugging and testing embedded systems

...tag as prices change. Attached are schematics and references for my desired components. I'd like to use the new ESP32-C6-MINI-1-N4 unit as the main controller, as I'm very familiar with ESP programming already, and want to take advantage of its many connectivity options including BLE, Zigbee, and Thread. The ePaper display itself will be the Pervasive 2.13" display using the ZIF25 connector and SPI protocol. Schematics and additional reference details are attached, please read these carefully to ensure the ePaper display module functions accordingly. It will be powered by two CR2450 button cells, but please include a USB C connector for programming and backup power source. I'll also need a notification LED and a tactile button. The outcomes I'm expect...

Creating a library to control the TMC5160 using only the SPI bus. The library must be ESP32 compatible and will not use other similar existing libraries for other TMCs. It must include: - basic functions for motor setup and movement, positioning - advanced functions such as CoolStep, StallGuard2, SpreadCycle and StealthChop2 - sensorless operation to find home position (StallGuard2) - the library must not block additional ESP code during motor running and control (delay commands etc) and must support running of multiple motors simultaneously (using CS signal) - deploying the library in VS Code + PlatformIO The library functionality will be tested on a TMC5160 BOB + NEMA 8 (8HS15-0604S).

I am looking for an experienced Verilog developer who can work on my Verilo HDL project. Design a digital circuit for a fruit sorter based on following specification. Develop the block diagram (consists of datapath and control units) and the ASMD chart. Assume that there is a 1-bit RESET signal to reset the circuit and it is asynchronous and active low. In addition, there is a 1-bit CLOCK as the clock. The circuit will start the operation when a 1-bit input signal START is asserted. A fruit detector provides a 1-bit input FRUIT that becomes 1 for one clock cycle if banana is detected and the FRUIT signal will be 1 for two clock cycles if orange is detected. There are 2 different outputs which are OUT1 and OUT2 that will be 1 for one clock cycle for the type of frui...

...into Verilog and run on FPGA device using HLS Vitis. The existing project has: - Edge detection capabilities - Image segmentation capabilities The primary goal of this project is not to enhance or alter the images, but to convert the existing codebase from C++ to Verilog, utilizing HLS Vitis. With your expertise: - Maintain the integrity of the current functionalities during conversion - Reframe the C++ code to Verilog language ensuring a seamless running on an FPGA device. The successful bidder should have significant experience with Verilog, C++, and HLS Vitis, as well as a good understanding of Image Processing algorithms, especially Edge Detection and Image Segmentation. The final output of the conversion should result in an image file product. The d...

...Experience with handling multi-channel signals. • Familiarity with line level audio signal processing and mixing. We need an engineer with deep experience in high-end analog circuit design using low noise operational amplifiers. We will provide basic diagrams and objectives. The project involves high quality op amps and line drivers for an audio routing project. We will be using FPGA platforms with SPI and TCP/IP to send commands to digitally controlled audio daughterboards in a card cage configuration. The proof of concept will include circuit design and a functioning prototype of two audio channel for control and noise and sweep analysis of the output. We have pre-selected chip sets and will provide prototype hardware....

...based development board. This project requires implementation of PS side SPI0, SPI1 and DMA to move data from 2 SPI slaves to onboard DDR3 memory. 1) Use your own Zynq 7000 based development board (e.g Microzed, Zedboard etc having DDR3 memory) that you already have. 2) To this board connect 2nos. of SPI EEPROM. We will supply you with the EEPROM boards with jumper cables on other end to connect to your development board. 3) 1st EEPROM connects to PS SPI0 & 2nd EEPROM connects to PS SPI1 interface. 4) Both the SPI interfaces will be configured to operate at 25MHz SPI clock frequency. 5) Configure the PS DMA (2 channels would be needed) for both PS SPI0 & PS SPI1 to read the SPI data and transfer that data to DDR3 using DMA at highest speed...

Greetings, We are assembling a dynamic team and currently seeking 4-5 proficient Electrical Engineers to join us for a long-term collaboration. This opportunity is ideal for individuals with expertise in electronics, power systems, and communication systems. Key Requirements: - Strong command over MATLAB for data analysis, simulation, and modeling. - Proficiency in VHDL and Verilog for hardware description and digital circuit design. - Experience with multisim or similar simulation software for circuit analysis and design verification. This collaboration offers an exciting chance to work on diverse projects spanning electronics, power systems, and communication systems. We are committed to fostering a collaborative environment that encourages innovation and professional growth. ...

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The goal of this project is using Vivado tools to enable a hardware implementation on an FPGA board. The key requirement from the FPGA board is high computational speed. Therefore, proficiency in Verilog language is preferred as I intend to implement the NTT algorithm. I am looking for a developer who is experienced with FPGA boards and Vivado tools. The chosen freelancer should also have the ability to maximize computing capabilities of the board for the said implementation.

I need verilog code,testbench and simulation for this duty : Design a vector processing system that performs dot product of two vectors kept in the memory. The length of the vector is given as an input and at each clock cycle one element from each vector is multiplied and added. At the end of the processing a valid signal will be raised along with the result. Elements of the vectors are 8-bit unsigned vectors.

I need a talented RTL designer, proficient in Verilog, to carry out an NTT Implementation project focused on dataflow modeling. Key Requirements: - Expertise in Verilog, with a deep understanding and application of dataflow modeling - Prior experience in RTL design and synthesis - The main goal for this task is to achieve optimization of the design using your Verilog expertise - Attention to detail, punctuality, and efficient communication skills are a must This project offers an opportunity to work with an interesting model and explore optimized NTT implementation. Your contribution to this project will be influential in achieving an optimized design.

Im working on a c++ image processing project , and i need to convert my C++ code to Verilog using HLS vitis , then implement it to run on Ultra96v2 Xilinx FPGA board .

I'm in need of skilled programmers to develop interfaces for my Place and Route EDA flows. The ideal candidate will have experience in the following: - Proficiency in Python and/or C++ - Familiarity with VHDL, Verilog, and SystemVerilog - Experience in file input generation - Strong file parsing capabilities - Ability to manage EDA flows using TCL The interfaces need to be able to handle the entire EDA flow, from file input generation to error reporting. Experience in developing similar interfaces will be a big advantage. Please include relevant work samples in your bid.

Stepper motor controller in FPGA which generates pulses according to command. verilog code

Hello, - this logo (attached) in high quality a) in the colours of the logo of my website a) same text as example b) another almost same text "For Rent By Owner" c) another text "Agency Real Estate"

I'm seeking an experienced trainer for Spyglass tool, with a concentration on Lint and CDC (Clock Domain Crossing). As beginners in Spyglass and proficient in Verilog, we primarily aim to identify and fix coding errors through this training. Ideal Skills and Experience: - Strong knowledge of Lint and CDC in Spyglass tool - Demonstrated experience in coding and debugging in Verilog - Excellent training skills - Ability to create and simplify complex concepts for beginners.

I'm seeking a well-experienced developer who understands STM32...communication, and Remote device management would be an added bonus. The ideal candidate should have: - Proficiency in Wiznet development - Proficiency in STM32 development - Extensive experience with Ethernet connectivity - Understanding of data transfer speeds. Your job will be to write an optimal code, preferably in STM32CUBEIDE or Keil MDK Arm. The Wiznet W5500 is connected to STM32 via SPI, it should connect to ethernet router with DHCP mode and afterwards establish and maintain a websocket connection to public domain, sending and receiving data. The devices used are STM32F103C8 and Wiznet W5500. Please, make your bid indicating your understanding of the project, and your proposed timeline for complet...

Please help me solve the first file I upload, which uses psoc creator and the board is psoc 4200M, It would be best if you can remotely control my computer to help me complete it now. I hope it can be completed within 24 hours. It is an experiment on SPI wireless stepper motor control, the configuration part is done, and the board that connects the circuit is also connected to my computer, I need someone help me and help me write the code (C).

...programmer, who possesses proficiency in both Verilog and Vivado, to construct and operate a user-friendly program for my FPGA board. The selected FPGA board is from the Xilinx Artix-7 family (part: xc7a100tcsg324-1). The program’s main responsibility will be to feature a rudimentary vending machine program with the following specifications: - Two component spaces which will each hold a distinct item. - A simplified interface featuring two push buttons as part of a keypad. - A capable card reader to handle seamless payment processing. - A clear 3 digit display that relays instructions and alerts to the user. An ideal candidate for this project should have extensive experience working with Artix-7 FPGA boards and demonstrate a clear understanding of Verilog and V...

...programmer, who possesses proficiency in both Verilog and Vivado, to construct and operate a user-friendly program for my FPGA board. The selected FPGA board is from the Xilinx Artix-7 family (part: xc7a100tcsg324-1). The program’s main responsibility will be to feature a rudimentary vending machine program with the following specifications: - Two component spaces which will each hold a distinct item. - A simplified interface featuring two push buttons as part of a keypad. - A capable card reader to handle seamless payment processing. - A clear 3 digit display that relays instructions and alerts to the user. An ideal candidate for this project should have extensive experience working with Artix-7 FPGA boards and demonstrate a clear understanding of Verilog and V...

I am in need of a seasoned FPGA programmer, proficient in Verilog and Vivado, who can build and run a program for me on a ZYNQ 7000 FPGA board. Our primary goal is: - To work on a program that performs Homomorphic Encryption Algorithm, by analysing its architecture - You'll need to identify the blocks responsible for addition and multiplication operations, as well as enumerate all IO used for these operations. Ideal candidate should have: - Extensive experience in conveying complex FPGA architectures in an understandable form - Proficiency in using Vivado for hardware simulation

In our bid to increase the number of job applications we receive, we're searching for an expert to assist in creating effective job advertisements specifically catering to Facebook audiences. Here's what the job entails: - Prepare ...below photos show me what you can do, i will award the ongoing business to the advertisements that i like the most. 'picture advert' incorporate our logo and some overlay of the below info Are you a highly skilled breakdown heavy plant mechanic, looking for a new challenge? -experience with Liebherr / Cat diagnostics -Even time -multiple embedded site positions -new feild service Ute -$65 to $115 per hour -want to work for a company where you truly matter? 'video post' add our logo and a phrase focus on safety so yo...

I'm looking for an expert who can assist me in interfacing SPI with an SDHC card for data storage on an MSP430 FR4133. Key Requirements: - The primary purpose of this project is to facilitate the storage of multimedia files on the SDHC card. - While the read/write speed isn't of utmost importance, it is moderately critical to keep up with the data storage requirements. Ideal Skills and Experience: - Proficiency in programming the MSP430 and interfacing SPI. - Prior experience in data storage projects, particularly handling multimedia files. If you're confident in your abilities and have a solid understanding of these requirements, I'd love to hear from you.

IF YOU ARE LOOKING FOR A GRAPHIC DESIGN, WE ARE AVAILABLE FOR YOU. 1. logo design- $50 2. posts and banners- $50 3. flyer design- $60 4. brochure - $100 5. poster and business card-$80 6. Album cover- $115 7. Menu design- $120 8. book cover- $140 9. design advice- $350 10. Portraits- $250 CONTACT US ON- (+27663603665) WHATSAPP US ON- (0663603665) WEBSITE LINK-

I'm seeking a skilled FPGA developer to construct an intermediate-level chessAI project. The AI is expected to run real-time on a Spartan-7 FPGA board, using Vivado and Vitis. Key Project Details: - **Real-time Performance:** The AI should be optimised for real-time operation on the FPGA board. - **Intermediate Complexity:** The chessAI should be capable of intermediate-level game play, providing engaging and challenging performance. - **FPGA Model:** The project is designed for a Spartan-7 FPGA board, hence prior experience with this model is preferable. Key Skill Requirements: - Proficiency in FPGA development, particularly with Vivado and Vitis. - Prior experience in designing chessAI or comparable AI projects. - Expertise in optimising AI models for real-time FPGA implementation...

DEADLINE 21st I need an Object Detection(displays text on screen of object name) & Live Streaming system(records video when switch or button pressed), all to be implemented on a Zybo Z7 board with a pcam 5c camera module. Here are the details: - **Programming Language**: The system needs to be developed using verilog and xlinx tools. - **Standalone or Integrated**: I'm looking for the Object Detection & Live Streaming system to be integrated with zyboz7 and pcam5c. - **Functionality**: The system should perform real-time object detection and identification, as well as record and store live streams for later analysis. Finally report that includes tests/testbenches should be included based on requirements in

...stability, low noise and absolute value representation) K thermocouple element measurement. Two approaches are forseen - using the high precision MAX31856 as well as the AD8495 in conjunction with a 20-bit SAR and 24-bit SigDelt ADC. Apart from the ADC proposition the project comprisis of a full circuit and PCB creation. Additionaly also the needed firmware for the respective communication (over SPI) shall be properly implemented (well structured and with readable comments). Finally also testing should take please for measure the achievable performance of the proposed and implemented solutions. Please read carefully the attached project sheet with even more details. Looking forward to work together with an experienced engineer in the analog design and embedded domain. Feel fr...

...Rockchip RK3588: - Connect the RK3588 SoC to the necessary power supplies, clock signals, and peripherals according to its datasheet. 2. 4GB/8GB RAM: - Connect the RAM module(s) to the RK3588 SoC's memory interface, ensuring proper signal routing and power connections. 3. eMMC: - Connect the eMMC storage device to the appropriate interface on the RK3588 SoC, typically using MMC/SDIO or SPI interface. 4. NVMe M.2 SSD Port: - Provide the necessary connections for the NVMe M.2 SSD port, including PCIe lanes and power connections. 5. USB C Type Data + Power Connector (3 Male Connectors) & (3 Female Connectors): - Connect the USB Type-C connectors to the RK3588 SoC or an appropriate USB controller, ensuring proper signal routing for data and power delivery....

I'm looking for a developer to create a system for my Zybo Z7 board that can detect people in real-time through a connected pcam5c camera and display the detection text on the video feed...Video Streaming: The video feed should be streamed in real-time. - Text Overlay: The detection results should be displayed as a text overlay on the video. Skills/Experience Required: - Proficient in Xilinx SDK and Xilinx Vivado. - Strong background in object detection, particularly with people. - Previous experience with video processing and streaming. - Knowledge of FPGA programming and VHDL/Verilog is a plus. Please note that my budget for this project is $60. I'm open to hearing from freelancers who can deliver within this budget. I have worked on single pixel (multipixel zoom.v i...

We require microcontroller programming services to execute sensor interfacing and manage communication protocols. Our project needs an expert who can: - Interface our 32 bit PIC microcontroller with temperature sensors, analog circuits like Op-Amp and ADC - Implement SPI communication protocol within the microcontroller Experience with PIC microcontrollers is a must, along with a sound understanding of sensors, analog-to-digital conversion (ADC), and SPI protocol. Proven experience in similar tasks will make you an ideal candidate for us.

The project will be done in 2 parts , 1- controlling adf4356 rf synthesizer with matlab code and arduino uno hardware. The work will be done and tested on my hardware using TeamViewer. 2- Controlling mcp3424 and matlab in a loop such that the rf synthesizer generates the frequencies from 0.5 to 1.5 ghz with controllable output power. The mcp 3424 module reads those signals. The code for mcp module reading will be provided, which you can integrate in your adf code in Matlab.

I am looking for a freelancer to help me with a project that involves evaluating image quality with implementing machine learning algorithms on an FPGA. VIVADO would be preferred to work on. I am seeking a detailed project proposal from freelancers. with Verilog coding Ideal skills/experience: VERILOG VIVADO

My project requires the efficient application of Gaussian filtering in Verilog specifically for enhancing image details. The image type for this task is RGB, and the intended result should lead to clear, detailed images showcasing the potential of Gaussian filters. Key requirements include: - Applying Gaussian filtering to provide image enhancement - Working specifically with RGB images - Delivery of processed images in JPEG format Given the technical nature of this project, proficiency in Verilog and image processing is crucial. A deep understanding of Gaussian filtering algorithms is also necessary. Experience with image manipulation software would be a bonus. This project is ideal for freelancers who are detail-oriented and are adept at transforming complex requirements...

As per your requirements, I will perform a comprehensive latest bugs vulnerability analysis on word press as mentioned in the CVE website for 2024. Based on that overall project cost will be 115 Euro. 50% Advance Payment 50% After the completion of the project Overall project submitted by 25th April 2024. I will provide 2 documents at the end as a deliverable. 1. Comprehensive document as required for the job similar to the sample shared. 2. Configuration steps. Regards, Bhashit Pandya

I'll create 6 new listings and also fix your existing 6 listings in 115 CAD.